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ARM Process state -- SPSR

news 来源：原创 2024/9/30 18:51:13

Holds the saved process state for the current mode.
保存当前模式的已保存进程状态。

N, bit [31]
Set to the value of PSTATE.N on taking an exception to the current mode, and copied to PSTATE.N on executing an exception return operation in the current mode.
设置为PSTATE的值。N对当前模式进行异常处理，并复制到PSTATE。N在当前模式下执行异常返回操作。

Z, bit [30]
Set to the value of PSTATE.Z on taking an exception to the current mode, and copied to PSTATE.Z on executing an exception return operation in the current mode.
设置为PSTATE的值。Z对当前模式进行异常处理，并复制到PSTATE。Z在当前模式下执行异常返回操作。

C, bit [29]
Set to the value of PSTATE.C on taking an exception to the current mode, and copied to PSTATE.C on executing an exception return operation in the current mode.
设置为PSTATE的值。C对当前模式进行异常处理，并复制到PSTATE。C在当前模式下执行异常返回操作。

V, bit [28]
Set to the value of PSTATE.V on taking an exception to the current mode, and copied to PSTATE.V on executing an exception return operation in the current mode.
设置为PSTATE的值。V对当前模式进行异常处理，并复制到PSTATE。V在当前模式下执行异常返回操作。

Q, bit [27]
Set to the value of PSTATE.Q on taking an exception to the current mode, and copied to PSTATE.Q on executing an exception return operation in the current mode.
设置为PSTATE的值。Q对当前模式进行异常处理，并复制到PSTATE。Q在当前模式下执行异常返回操作。

J, bit [24]
    RES0.
    In previous versions of the architecture, the {J, T} bits determined the AArch32 Instruction set state. ARMv8 does not support either Jazelle state or T32EE state, and the T bit determines the Instruction set state.
    在架构的早期版本中，{J，T}位决定了AArch32指令集状态。ARMv8不支持Jazelle状态或T32EE状态，T位决定指令集状态。

PAN, bit [22]
    When ARMv8.1-PAN is implemented:
    Privileged Access Never. This bit is set to the value of PSTATE.PAN on taking an exception to the current mode, and copied to PSTATE.PAN on executing an exception return operation in the current mode.
    特权访问永远不会。此位设置为PSTATE的值。PAN对当前模式进行异常处理，并复制到PSTATE。PAN在当前模式下执行异常返回操作。

DIT, bit [21]
    When ARMv8.4-DIT is implemented:
    Data Independent Timing. This bit is set to the value of PSTATE.DIT on taking an exception to the current mode, and copied to PSTATE.DIT on executing an exception return operation in the current mode.
    数据独立计时。此位设置为PSTATE的值。DIT对当前模式进行异常处理，并复制到PSTATE。在当前模式下执行异常返回操作时执行DIT。

IL, bit [20]
Illegal Execution state bit. Shows the value of PSTATE.IL immediately before the exception was taken.
非法执行状态位。显示PSTATE的值。在采取例外措施之前。

GE, bits [19:16]
Greater than or Equal flags, for parallel addition and subtraction.
大于或等于标志，用于并行加法和减法。

IT[7:2], bits [15:10]
IT block state bits for the T32 IT (If-Then) instruction.
T32 IT（If Then）指令的IT块状态位。

E, bit [9]
    Endianness state bit. Controls the load and store endianness for data accesses:
    端序状态位。控制数据访问的加载和存储端序
    0b0 Little-endian operation
    0b1 Big-endian operation.

A, bit [8]
    SError interrupt mask bit.
    0b0 Exception not masked.
    0b1 Exception masked.

I, bit [7]
    IRQ mask bit.
    0b0 Exception not masked.
    0b1 Exception masked.

F, bit [6]
    FIQ mask bit.
    0b0 Exception not masked.
    0b1 Exception masked.

T, bit [5]
    T32 Instruction set state bit. Determines the AArch32 instruction set state that the exception was taken from.
    T32指令集状态位。确定异常来自的AArch32指令集状态。
    0b0 Taken from A32 state.
    0b1 Taken from T32 state.

M[4], bit [4]
    Execution state that the exception was taken from.
    异常发生的执行状态。
    0b1 Exception taken from AArch32.

M[3:0], bits [3:0]
    AArch32 mode that an exception was taken from.
    发生异常的AArch32模式。
    0b0000 User.
    0b0001 FIQ.
    0b0010 IRQ.
    0b0011 Supervisor.
    0b0110 Monitor (only valid in Secure state, if EL3 is implemented and can use AArch32).
    0b0111 Abort.
    0b1010 Hyp.
    0b1011 Undefined.
    0b1111 System.
    Other values are reserved.